? 2005 fairchild semiconductor corporation ds500147 www.fairchildsemi.com december 1998 revised february 2005 74vhct14a hex schmitt inverter 74vhct14a hex schmitt inverter general description the vhct14a is an advanced high speed cmos hex schmitt inverter fabricated with silicon gate cmos technol- ogy. the vhct14a contains six independent inverters which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. protection circuits ensure that 0v to 7v can be applied to the input pins without regard to the supply voltage and to the output pins with v cc 0v. these circuits prevent device destruction due to mismatched supply and input/ output voltages. this device can be used to interface 3v to 5v systems and two supply systems such as battery backup. features high speed: t pd 5.0 ns (typ) at t a 25 q c high noise immunity: v ih 2.0v, v il 0.8v power down protection is provided on all inputs and out- puts low noise: v olp 1.0v (max) low power dissipation: i cc 2 p a (max) @ t a 25 q c pin and function compatible with 74hct14 ordering code: surface mount packages are also available on tape and reel. specify by appending the suffix letter ?x? to the ordering code. pb-free package per jedec j-std-020b. note 1: ?_nl? indicates pb-free package (per jedec j-std-020b). device available in tape and reel only. logic symbol pin descriptions connection diagram truth table order number package package description number 74vhct14am m14a 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow 74vhct14asj m14d pb-free 14-lead small outline package (sop), eiaj type ii, 5.3mm wide 74vhct14amtc mtc14 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide 74vhct14amtcx_nl (note 1) mtc14 pb-free 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide 74vhct14an n14a 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide pin names description a n inputs o n outputs ao lh hl
www.fairchildsemi.com 2 74vhct14a absolute maximum ratings (note 2) recommended operating conditions (note 6) note 2: absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. the databook specifica- tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari- ables. fairchild does not recommend operation outside databook specifica- tions. note 3: high or low state. i out absolute maximum rating must be observed. note 4: v cc 0v. note 5: v out gnd, v out ! v cc (outputs active) note 6: unused inputs must be held high or low. they may not float. dc electrical characteristics noise characteristics note 7: parameter guaranteed by design. supply voltage (v cc ) 0.5v to 7.0v dc input voltage (v in ) 0.5v to 7.0v dc output voltage (v out ) (note 3) 0.5v to v cc 0.5v (note 4) 0.5v to 7.0v input diode current (i ik ) 20 ma output diode current (i ok ) (note 5) r 20 ma dc output current (i out ) r 25 ma dc v cc /gnd current (i cc ) r 50 ma storage temperature (t stg ) 65 q c to 150 q c lead temperature (t l ) (soldering, 10 seconds) 260 q c supply voltage (v cc ) 4.5v to 5.5v input voltage (v in ) 0v to 5.5v output voltage (v out ) (note 3) 0v to v cc (note 4) 0v to 5.5v operating temperature (t opr ) 40 q c to 85 q c symbol parameter v cc (v) t a 25 q ct a 40 q c to 85 q c units conditions min typ max min max v p positive threshold voltage 4.5 1.9 1.9 v 5.5 2.1 2.1 v n negative threshold volt- age 4.5 0.5 0.5 v 5.5 0.6 0.6 v h hysteresis voltage 4.5 0.4 1.4 0.4 1.4 v 5.5 0.4 1.5 0.4 1.5 v oh high level output voltage 4.5 4.40 4.50 4.40 v v in v il i oh 50 p a 3.94 3.80 v i oh 8 ma v ol low level output voltage 4.5 0.0 0.1 0.1 v v in v ih i ol 50 p a 0.36 0.44 v i ol 8 ma i in input leakage current 0 5.5 r 0.1 r 1.0 p av in 5.5v or gnd i cc quiescent supply current 5.5 2.0 20.0 p av in v cc or gnd i cct maximum i cc /input 5.5 1.35 1.50 ma v in 3.4v other inputs v cc or gnd i off output leakage current 0.0 0.5 5.0 p av out 5.5v (power down state) symbol parameter v cc (v) t a 25 q c units conditions typ limits v olp (note 7) quiet output maximum dynamic v ol 5.0 0.8 1.0 v c l 50 pf v olv (note 7) quiet output minimum dynamic v ol 5.0 0.8 1.0 v c l 50 pf v ihd (note 7) minimum high level dynamic input voltage 5.0 2.0 v c l 50 pf v ild (note 7) maximum low level dynamic input voltage 5.0 0.8 v c l 50 pf
3 www.fairchildsemi.com 74vhct14a ac electrical characteristics note 8: c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc (opr.) c pd * v cc * f in i cc /6 (per gate). symbol parameter v cc t a 25 q c t a 40 q c to 85 q c units conditions (v) min typ max min max t phl propagation delay 5.0 r 0.5 5.0 7.6 1.0 9.0 ns c l 15 pf t plh 6.5 9.6 1.0 11.0 ns c l 50 pf c in input capacitance 2 10 10 pf v cc open c pd power dissipation capacitance 11 pf (note 8)
www.fairchildsemi.com 4 74vhct14a physical dimensions inches (millimeters) unless otherwise noted 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow package number m14a
5 www.fairchildsemi.com 74vhct14a physical dimensions inches (millimeters) unless otherwise noted (continued) pb-free 14-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m14d
www.fairchildsemi.com 6 74vhct14a physical dimensions inches (millimeters) unless otherwise noted (continued) 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc14
7 www.fairchildsemi.com 74vhct14a hex schmitt inverter physical dimensions inches (millimeters) unless otherwise noted (continued) 14-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide package number n14a fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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